Since the advent of computers, there has been a steady drive toward producing smaller and more capable electronic devices, such as computing devices, communication devices and memory devices. In order to reduce the size of such devices, while maintaining or improving their respective capabilities, the size of components within the devices must be reduced. Several of the components within electronic devices are made from semiconductor materials, which in some cases are provided via a structure called a semiconductor wafer. Semiconductor wafers may be used to produce integrated circuits (ICs) having the performance and size characteristics desirable for a particular component.
Since modern integrated circuits can be manufactured to such small scales, any defects on the ICs may have a relatively large impact on performance. If a defect is of a nature or size that is sufficient to damage semiconductor circuits or degrade the operating characteristics of such circuits, the corresponding semiconductor device's performance may be deteriorated. Defects, which may be produced during any of a plurality of manufacturing process steps, may cause shorts, opens or other anomalies that prevent normal operation of the semiconductor device. The impact caused by a particular defect is often directly related to the corresponding nature (e.g., size and/or location) of the defect. These defects must typically be recognized so that the defective components may be removed before they are provided to consumers.
Numerous testing processes have been developed to attempt to identify defects at various stages of the production process. Electron beam (e-beam) imaging is one example of a testing process that may be used to look for defects in certain devices such as memory arrays. An e-beam inspection or scan tool that is sensitive to electrical properties may provide resolution sufficient to detect defects that may not be perceivable by optical methods. However, for a standard shallow trench isolation (STI) mask, the active area (e.g., N+/P−well areas) may be structured such that piping between contact plugs (COs) (i.e., piping between contact plug to contact plug or CO to CO) may be hard to detect. The difficulty in detecting such piping may be at least in part due to the fact that there is only one surrounding of flash CO in the array active area, so all of the COs are typically grounded to make it difficult to detect piping. The piping would manifest itself by the connected COs having the same potential. However, if all COs are grounded, it may be hard to detect a difference between normal and piping COs based on the gray level difference therebetween.
Accordingly, it may be desirable to provide an improved testing pattern that may address some of the shortcomings described above.